FPGA @ Systems Group, ETH Zurich

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fpga-network-stack fpga-network-stack Public

Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

C++ 753 270
spooNN spooNN Public

FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)

Jupyter Notebook 261 73
Coyote Coyote Public

Framework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms.

SystemVerilog 219 67
Vitis_with_100Gbps_TCP-IP Vitis_with_100Gbps_TCP-IP Public

100 Gbps TCP/IP stack for Vitis shells

C++ 184 75
caribou caribou Public

Caribou: Distributed Smart Storage built with FPGAs

Verilog 64 21
davos davos Public

Distributed Accelerator OS

SystemVerilog 60 28

Repositories

sgrt Public
Systems Group RunTime.

fpgasystems/sgrt’s past year of commit activity

C 1 MIT 0 0 0 Updated Oct 30, 2024
Coyote Public
Framework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms.

fpgasystems/Coyote’s past year of commit activity

SystemVerilog 219 MIT 67 13 (2 issues need help) 3 Updated Oct 29, 2024
sgrt_install Public
Systems Group RunTime Installation.

fpgasystems/sgrt_install’s past year of commit activity

Shell 0 MIT 0 0 0 Updated Oct 23, 2024
AMD-OHC-2024 Public
Our contribution to the AMD Open Hardware Contest: A ML-based Deep Packet Inspection for RDMA-networking on FPGAs

fpgasystems/AMD-OHC-2024’s past year of commit activity

Verilog 0 0 0 0 Updated Oct 7, 2024
hacc Public
ETHZ Heterogeneous Accelerated Compute Cluster.

fpgasystems/hacc’s past year of commit activity

29 MIT 1 0 0 Updated Oct 1, 2024
dedup Public

fpgasystems/dedup’s past year of commit activity

Scala 0 1 0 0 Updated Sep 12, 2024
Chameleon-RAG-Acceleration Public

fpgasystems/Chameleon-RAG-Acceleration’s past year of commit activity

C++ 0 0 0 0 Updated Sep 10, 2024
RecoNIC_RDMA_port Public Forked from romarx/RecoNIC
RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.

fpgasystems/RecoNIC_RDMA_port’s past year of commit activity

SystemVerilog 0 MIT 27 0 0 Updated Sep 5, 2024
gcow Public
🐄 Gradient compression on the wire

fpgasystems/gcow’s past year of commit activity

C++ 2 0 0 0 Updated Apr 28, 2024
Vitis_with_100Gbps_TCP-IP Public
100 Gbps TCP/IP stack for Vitis shells

fpgasystems/Vitis_with_100Gbps_TCP-IP’s past year of commit activity

C++ 184 75 19 1 Updated Apr 23, 2024